Page History

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Processor: The port supports only 64-bit PPC machines. It recognizes Power chips 5 through 7 and generates code optimized for these processors. So far, it lacks an instruction scheduler targeted to Power 6, which is an in-order issueing processor.  Jdk 9 will contain support for Power 8.

Interpreter and Compiler

The port is derived from a VM targeted towards server applications. Therefore it focuses on maximizing peak performance. Thus, it utilizes the high end C2 optimizing compiler of HotSpot.  First, we ported the CPP interpreter, but by now also added a port of the template interpreter.  Since 8u20 big- and little-endian vairant vairants should be built using the template interpreter, which is the default. 

The port does not support the C1 compiler.  Contributions are welcomeSAP is working on this.

Supported HotSpot features

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The C2 compiler uses implicit null checks, which requires required some adaptions to shared code as on AIX the zero page is not protected.

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